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Each 74LVC245 has a 0.1 uF ceramic bypass capacitor about 2 mm from its VCC pin. Three of the chips are configured for unidirectional signals like the address bus and control signals, and the fourth is bidirectional for the 8-bit data bus. A set of four 74LVC245 chips provide 5V to 3.3V level translation. The FPGA runs at 3.3V, powered from a Micrel MIC5504-3.3YM5-TR LDO regulator. Some hardware background: shown above is a simplified schematic of the card (click for a hi-res version). From this I concluded that the crash is happening during execution of the Yellowstone ROM code, rather than the Yellowstone card somehow causing an error with another card or with the Apple II itself. I measured times of 0.19ms, 1.57ms, and 28.5ms. During a boot-up where the computer crashes, this ROM access lasts a much shorter random-seeming amount of time.
#Macspice oyunu code#
During a normal boot, there’s a 93ms period of near-continuous Yellowstone ROM access, which is probably running the ROM code to look for an attached drive. With a logic analyzer, I examined the pattern of card accesses during good and bad power-up sequences.
#Macspice oyunu driver#
More cards means more capacitance on the data bus: maybe the Yellowstone output driver wasn’t able to switch the bus signals fast enough? More cards also means more load on the data bus: maybe the Yellowstone output driver wasn’t able to source or sink enough current to maintain a valid logic high or low voltage?
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Those nice clean zeroes and ones are gone, and instead I’m struggling with voltages, logic thresholds, capacitance, and power in an attempt to explain what’s going wrong. That’s the story of my Yellowstone FPGA-based disk controller for Apple II, and it’s slowly driving me crazy. The digital abstraction of zeroes and ones is lovely, but electronics debugging often requires a deeper look into the realm of analog signals.
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